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PIC16F946
DS41265A-page 198
Preliminary
2005 Microchip Technology Inc.
TABLE 16-4:
INITIALIZATION CONDITION FOR REGISTERS
Register
Address
Power-on
Reset
MCLR Reset
WDT Reset
Brown-out Reset(1)
Wake-up from Sleep
through interrupt
Wake-up from Sleep
through WDT time-out
W—
xxxx xxxx
uuuu uuuu
INDF
00h/80h/
100h/180h
xxxx xxxx
uuuu uuuu
TMR0
01h/101h
xxxx xxxx
uuuu uuuu
PCL
02h/82h/
102h/182h
0000 0000
PC + 1
(3)
STATUS
03h/83h/
103h/183h
0001 1xxx
000q quuu
(4)
uuuq quuu
(4)
FSR
04h/84h/
104h/184h
xxxx xxxx
uuuu uuuu
PORTA
05h
xxxx xxxx
0000 0000
uuuu uuuu
PORTB
06h/106h
xxxx xxxx
0000 0000
uuuu uuuu
PORTC
07h
xxxx xxxx
0000 0000
uuuu uuuu
PORTD
08h
xxxx xxxx
0000 0000
uuuu uuuu
PORTE
09h
xxxx xxxx
0000 0000
uuuu uuuu
PCLATH
0Ah/8Ah/
10Ah/18Ah
---0 0000
---u uuuu
INTCON
0Bh/8Bh/
10Bh/18Bh
0000 000x
uuuu uuuu
(2)
PIR1
0Ch
0000 0000
uuuu uuuu
(2)
PIR2
0Dh
0000 -0-0
uuuu -u-u
TMR1L
0Eh
xxxx xxxx
uuuu uuuu
TMR1H
0Fh
xxxx xxxx
uuuu uuuu
T1CON
10h
0000 0000
uuuu uuuu
TMR2
11h
01-0 0-00
uu-u u-uu
T2CON
12h
-000 0000
-uuu uuuu
SSPBUF
13h
xxxx xxxx
uuuu uuuu
SSPCON
14h
0000 0000
uuuu uuuu
CCPR1L
15h
0000 0000
uuuu uuuu
CCPR1H
16h
0000 0010
uuuu uuuu
CCP1CON
17h
000x 000x
uuuu uuuu
RCSTA
18h
---0 1000
---u uuuu
TXREG
19h
0000 0000
uuuu uuuu
RCREG
1Ah
0000 0000
uuuu uuuu
CCP2CON
1Dh
--00 0000
--uu uuuu
ADRESH
1Eh
xxxx xxxx
uuuu uuuu
Legend: u = unchanged, x = unknown, – = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1:
If VDD goes too low, Power-on Reset will be activated and registers will be affected differently.
2:
One or more bits in INTCON and/or PIR1 will be affected (to cause wake-up).
3:
When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt
vector (0004h).
4:
See Table 16-5 for Reset value for specific condition.
5:
If Reset was due to brown-out, then bit 0 = 0. All other Resets will cause bit 0 = u.
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